CLOCK LOGIC DOMINO CIRCUITS FOR HIGH-SPEED AND ENERGY E ~ C I E N T MICROPROCESSOR PIPELINES.POMPES PAR TRANSITIONS MULTIPLES

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" CLOCK LOGIC DOMINO CIRCUITS FOR HIGH-SPEED AND ENERGY E ~ C I E N T MICROPROCESSOR PIPELINES.POMPES PAR TRANSITIONS MULTIPLES "

Document Type	:	Latin Dissertation
Language of Document	:	English
Record Number	:	153739
Doc. No	:	ET25531
Main Entry	:	Raymond Jit-Hung Sung
Title Proper	:	CLOCK LOGIC DOMINO CIRCUITS FOR HIGH-SPEED AND ENERGY E ~ C I E N T MICROPROCESSOR PIPELINES.POMPES PAR TRANSITIONS MULTIPLES
Note	:	This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract	:	This work was sponsored by the National Sciences and Engineering Research Council ofCanada (NSERC), the Alberta Informatics Circle of Research Excellence (iCORE), theCanadian Microelectronics Corporation (CMC), and by Micronet R & D. Special thanksgoes out to Steve Dillen for introducing me to the spectreverilog simulation environmentand for comments concerning some of the ideas contained in this dissertation. Thanksalso to John Koob who helped me with Latex and the VIM editor. Thanks to RaewadeeParnmukh for the completing the CL-domino ALU layout for future extracted layout withcapacitance simulations. Last, a special word of thanks to my supervisor Duncan Elliottfor the initial idea behind Clock Logic domino and for all of the comments, changes to theequations and edits..
Subject	:	Electericl tess
	:	برق
electronic file name	:	TL49789.pdf
Title and statement of responsibility and	:	CLOCK LOGIC DOMINO CIRCUITS FOR HIGH-SPEED AND ENERGY E ~ C I E N T MICROPROCESSOR PIPELINES.POMPES PAR TRANSITIONS MULTIPLES [Thesis]