A Low Voltage Low Power 10-bit Pipeline ADC in 90nm Digital CMOS Technology.POMPES PAR TRANSITIONS MULTIPLES

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" A Low Voltage Low Power 10-bit Pipeline ADC in 90nm Digital CMOS Technology.POMPES PAR TRANSITIONS MULTIPLES "

Document Type	:	Latin Dissertation
Language of Document	:	English
Record Number	:	153711
Doc. No	:	ET25503
Main Entry	:	Robert Wang
Title Proper	:	A Low Voltage Low Power 10-bit Pipeline ADC in 90nm Digital CMOS Technology.POMPES PAR TRANSITIONS MULTIPLES
Note	:	This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract	:	The continuous trend in shrinlung transistor size and reducing power supply voltage hasprompted an increasing demand for low voltage analog circuit designs. A novel switchedbuffer switching technique in complimentary metal oxide semiconductor (CMOS) has beenimplemented for switched capacitor circuits in a low voltage low power 10-bit pipeline.
Subject	:	Electericl tess
	:	برق
electronic file name	:	TL49759.pdf
Title and statement of responsibility and	:	A Low Voltage Low Power 10-bit Pipeline ADC in 90nm Digital CMOS Technology.POMPES PAR TRANSITIONS MULTIPLES [Thesis]