A Novel Double Edge-Triggered Pulse-Clocked TSPC D Flip-Flop for High-Performance and Low-Power VLSI Design ApplicationsPOMPES PAR TRANSITIONS MULTIPLES

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" A Novel Double Edge-Triggered Pulse-Clocked TSPC D Flip-Flop for High-Performance and Low-Power VLSI Design ApplicationsPOMPES PAR TRANSITIONS MULTIPLES "

Document Type	:	Latin Dissertation
Language of Document	:	English
Record Number	:	153333
Doc. No	:	ET25125
Main Entry	:	Bill Pcntikakis
Title Proper	:	A Novel Double Edge-Triggered Pulse-Clocked TSPC D Flip-Flop for High-Performance and Low-Power VLSI Design ApplicationsPOMPES PAR TRANSITIONS MULTIPLES
Note	:	This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract	:	Clocking is an important aspect of digital VLSI system design. The design of high-performance and low-power clocked storage elements is essential and critical toachieving maximum levels of performance and reliability in modem VLSI systems such.
Subject	:	Electericl tess
	:	برق
electronic file name	:	TL49343.pdf
Title and statement of responsibility and	:	A Novel Double Edge-Triggered Pulse-Clocked TSPC D Flip-Flop for High-Performance and Low-Power VLSI Design ApplicationsPOMPES PAR TRANSITIONS MULTIPLES [Thesis]