SIMULATION AND ANALYSIS OF HIGH SPEED CONDITIONAL CARRY SELECT ADDER

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" SIMULATION AND ANALYSIS OF HIGH SPEED CONDITIONAL CARRY SELECT ADDER "

Document Type	:	Latin Dissertation
Language of Document	:	English
Record Number	:	151852
Doc. No	:	ET23644
Main Entry	:	SRILATHA RANGANADHAM
Title Proper	:	SIMULATION AND ANALYSIS OF HIGH SPEED CONDITIONAL CARRY SELECT ADDER
Note	:	This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract	:	In a very large scale integration (VLSI) CPU, the adder is an important circuit.The speed performance of a CPU is predominantly determined by its adder circuit. Theperformance of adder varies with the logic styles used in designing the adder. Theperformance criteria for logic styles are circuit speed, power dissipation, and wiringcomplexity as well an ease-of-use and generality in cell based design techniques.Previously reported adder circuits showed successively incremented carry nu~nber block(SICNB) c a y select adder to have high performance than conventional adder. Passtransistor logic and complementary pass-transistor logic (CPL) are becoming increasinglyimportant in the design of digital integrated circuits owing to their speed and powerefficiency as compared with conventional CMOS logic. The performance of addersdepends not only on designing style but also on the logic style used. In this work,multiplexer and carry circuits are drawn in three different logics -CPL, DPL and CMOSwith pass gates and a SICNB CCS adder is drawn using these multiplexers and carry...........-....,....-...,..tested for theQ1 PC1 bus cardBoth these projects mere sofixare des elopment efforts tonards contributing to dlfferentaspects of Roboucs and lZ1echatronics projects m the Controls and Roboucs Group..
Subject	:	Electericl tess
	:	برق
electronic file name	:	TL46889.pdf
Title and statement of responsibility and	:	SIMULATION AND ANALYSIS OF HIGH SPEED CONDITIONAL CARRY SELECT ADDER [Thesis]