DESIGN OF 10-TRANSISTOR LOW-POWER FULL ADDERS

دانشگاه آزاد اسلامی اصفهان(خوراسگان)

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" DESIGN OF 10-TRANSISTOR LOW-POWER FULL ADDERS "

Document Type	:	Latin Dissertation
Language of Document	:	English
Record Number	:	150867
Doc. No	:	ET22659
Main Entry	:	Hung Tien Bui
Title Proper	:	DESIGN OF 10-TRANSISTOR LOW-POWER FULL ADDERS
Note	:	This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract	:	We propose two approaches to design 1-bit full adders which can yield goodperformance at low power consumption. In the first approach, we design XOR/XNORgates using a minimal number of CMOS transistors. Comparing with 10 differentXOR/XNOR gates reported in literature, the new XOWXNOR gates consume less power.The gates consisting of the smallest number of transistors are combined to create 1-bitfull adders. The process is systematic and yields a total of 42 10-transistor 1I1 adders, 41of which are new. Simulation results show that most of the new adders pe~orm betterthan a previously existing 10-transistor adder and a complementary CMOS adder in termsof power and speed with heavier load. Three adders consistently perform better.In the second approach, we utilized a method called the centralized design to createfour new 10-transistor full adders. Simulation....-...,..tested for theQ1 PC1 bus cardBoth these projects mere sofixare des elopment efforts tonards contributing to dlfferentaspects of Roboucs and lZ1echatronics projects m the Controls and Roboucs Group..
Subject	:	Electericl tess
	:	برق
electronic file name	:	TL45885.pdf
Title and statement of responsibility and	:	DESIGN OF 10-TRANSISTOR LOW-POWER FULL ADDERS [Thesis]