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Document Type : Latin Dissertation
Language of Document : English
Record Number : 150494
Doc. No : ET22286
Main Entry : ANAND MAGADI
Title Proper : A HIGH SPEED MODULAR MULTIPLIER ARCHITECTURE BASED ON MODIFIED MONTGOMERY'S MULTIPLICATION ALGORITHM
Note : This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract : Many public-key cryptographic schemes make extensive use of modularexponentiation of long integers as its core arithmetic. Modular exponentiation can beaccomplished by a sequence of modular multiplication. Therefore, the quest for intrinsicschemes to fast modular multiplication becomes the foremost need to real timeencryption and decryption. In this thesis Montgomery's algorithm is revised such thatmodular multiplication can be executed nearly two times faster. The proposed algorithmis implemented by a two's complement Baugh-Wooley multiplier and a modular shifier-adder, both of which are designed as linear cellular arrays. The local interconnection,regularity and modularity make the proposed architecture suitable for VLSIimplementation. The proposed modular multiplier would be simulated using VHDL(Very High Speed Integrated Circuits Hardware Description Language) followed by animplementation on a FLEX1 OK FPGA chip using MaxPlus II sobare.-...,..tested for theQ1 PC1 bus cardBoth these projects mere sofixare des elopment efforts tonards contributing to dlfferentaspects of Roboucs and lZ1echatronics projects m the Controls and Roboucs Group..
Subject : Electericl tess
: برق
electronic file name : TL45492.pdf
Title and statement of responsibility and : A HIGH SPEED MODULAR MULTIPLIER ARCHITECTURE BASED ON MODIFIED MONTGOMERY'S MULTIPLICATION ALGORITHM [Thesis]
 
 
 
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