FPGA BASED IMPLEMENTATION OF A DLX PIPELINE DESIGN

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" FPGA BASED IMPLEMENTATION OF A DLX PIPELINE DESIGN "

Document Type	:	Latin Dissertation
Language of Document	:	English
Record Number	:	149535
Doc. No	:	ET21327
Main Entry	:	GOPINATH R POCHAREDDY
Title Proper	:	FPGA BASED IMPLEMENTATION OF A DLX PIPELINE DESIGN
Note	:	This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract	:	The basic reason to use pipelining is to increase the performance of a processor.Generally a pipeline breaks instructions into smaller pieces to allow parallel execution inthe processor. This is done by allowing the processor to execute different stages of aninstruction in parallel. In contrast, older designs execute the entire instruction beforeloading the next instruction. This was inefficient because some parts of the CPU areasremained idle.Pipelining has many issues but one of the biggest is the need to use interlocks anda second is that multiple cycle instructions can cause the pipeline to pause and keep thenew instructions from loading. DLX pipelines do not exhibit this problem as they weredesigned such that instructions take only one cycle to complete execution..
Subject	:	Electericl tess
	:	برق
electronic file name	:	TL44484.pdf
Title and statement of responsibility and	:	FPGA BASED IMPLEMENTATION OF A DLX PIPELINE DESIGN [Thesis]