Abstract
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Hasan, Jahangir Ph.D., Purdue University, May 2006. Efficient and Scalable HardwareTechniques for Edge and Core Routers. Major Professor: T. N. Vijaykumar.The growth of the Internet continues as its usage continues to pervade everydaylife, significantly impacting individuals, businesses, industries, and academia. Studieshave shown that the both the traffic and the number of hosts on the Internet have been, andare expected to continue, growing exponentially. In addition, security concerns and innovativeapplications continue to add to the functionality demanded by the Internet.The operation of the Internet is fundamentally facilitated by routers, or packetswitches. The growth trends in size, speed and functionality translate into opportunitiesand challenges in the design of future-generation routers. Edge-routers perform elaboratepacket processing, but with less rigid performance guarantees because they are usuallylower in cost. On the other hand, core-routers typically perform IP-lookup on the packetsand are expected to do so with worst-case guarantees, albeit at higher system cost. Furthermore,advanced packet classification and a possible transition to IPv6 require longestprefix matching (LPM) on keys significantly longer than IPv4, and there is need for anefficient LPM scheme for arbitrarily long keys.In edge-routers, elaborate.
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