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Document Type : Latin Dissertation
Language of Document : English
Record Number : 149189
Doc. No : ET20981
Main Entry : Yue Zhuo
Title Proper : TIMING AND CONGESTION DRIVEN ALGORITHMS FOR FPGA PLACEMENT
Note : This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract : I have been fortunate to have niy parents over the past 28 years. They always supportme whenever I was ambitious or i11 depression. I17ithout them. I can never be strong enoughto stand success and failure. I dedicate this thesis to theni.I joined the department of computer science aiid eiigiiieering of LIST i11 Fall 2005. Fromthat moment. I received great help from a lot of professors and friends. Dr. Hao Li is myniajor professor who taught nie a lot in the field of VLSI CAD. His encouragement andinvaluable advice really motivated me to work hard on research aiid this thesis.Dr. Farliad Sliahrokhi. n-lio impressed nie by his profound knowledge. gave me a lot ofinsight into graph theorj-..
Subject : Electericl tess
: برق
electronic file name : TL44127.pdf
Title and statement of responsibility and : TIMING AND CONGESTION DRIVEN ALGORITHMS FOR FPGA PLACEMENT [Thesis]
 
 
 
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