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Document Type : Latin Dissertation
Language of Document : English
Record Number : 149124
Doc. No : ET20916
Main Entry : JAYASHANKAR RAJASEKARAN
Title Proper : RECONFIGURABLE POLYNOMIAL BASIS ARCHITECTURE FOR MULTIPLICATION IN THE GALOIS FIELD
Note : This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract : An increasing number of cryptosystems are beginning to rely on computations invery large finite fields, thus highlighting a requirement for arithmetic operations on thosefields. Consequently, multiplication, an important operation costly in terms of gate countand time delay, is provided focus here with an effort to provide an efficient multiplierarchitecture for a Polynomial Multiplier operating in the Galois field (2M ). Taking amatrix multiplication approach, the multiplier has 2 modules, involves creation of aninitial product matrix and final vector product matrix unit, the latter using recursivebinary XOR trees. Timing and delay are improved by cyclic shift feeding of inputs. The.
Subject : Electericl tess
: برق
electronic file name : TL44062.pdf
Title and statement of responsibility and : RECONFIGURABLE POLYNOMIAL BASIS ARCHITECTURE FOR MULTIPLICATION IN THE GALOIS FIELD [Thesis]
 
 
 
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