A STUDY OF PHASE NOISE AND JITTER IN SUBMICRON CMOS PHASE-LOCKED LOOP CIRCUITS

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" A STUDY OF PHASE NOISE AND JITTER IN SUBMICRON CMOS PHASE-LOCKED LOOP CIRCUITS "

Document Type	:	Latin Dissertation
Language of Document	:	English
Record Number	:	148565
Doc. No	:	ET20357
Main Entry	:	Chi Zhang
Title Proper	:	A STUDY OF PHASE NOISE AND JITTER IN SUBMICRON CMOS PHASE-LOCKED LOOP CIRCUITS
Note	:	This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract	:	Phase-locked loops (PLLs) are widely used in communication systems. With thecontinuously expanding of market for high speed, portable communication devices. low noiseCMOS submicron integrated circuit designs of PLL for different applications are in largedemand. In this dissertation. phase noise and jitter properties of PLL and its building blocks areinvestigated both at the physical and system levels.At the physical level, hot carrier effect in submicron MOSFETs has been considered. Asone of the most dominant noise sources of PLL, the voltage-controlled oscillator (VCO) isconsidered when investigating the.
Subject	:	Electericl tess
	:	برق
electronic file name	:	TL43484.pdf
Title and statement of responsibility and	:	A STUDY OF PHASE NOISE AND JITTER IN SUBMICRON CMOS PHASE-LOCKED LOOP CIRCUITS [Thesis]