BUILT-IN SELF-TEST AND SELF-REPAIR ARCHITECTURE FOR DEFECT-TOLERANT WORD-ORIENTED LARGE CAPACITY MEMORIES.POMPES PAR TRANSITIONS MULTIPLES

منو

" BUILT-IN SELF-TEST AND SELF-REPAIR ARCHITECTURE FOR DEFECT-TOLERANT WORD-ORIENTED LARGE CAPACITY MEMORIES.POMPES PAR TRANSITIONS MULTIPLES "

Document Type	:	Latin Dissertation
Language of Document	:	English
Record Number	:	153899
Doc. No	:	ET25691
Main Entry	:	NADER GHATTAS
Title Proper	:	BUILT-IN SELF-TEST AND SELF-REPAIR ARCHITECTURE FOR DEFECT-TOLERANT WORD-ORIENTED LARGE CAPACITY MEMORIES.POMPES PAR TRANSITIONS MULTIPLES
Note	:	This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract	:	Nowadays, SRAM chips use sub-micron technology to achieve high capacity memories.An increase in the memory capacity beyond the technology limits will normally result invery poor yields. The defect tolerance becomes then of a great importance for therealization of ultra-large capacity memory chips..
Subject	:	Electericl tess
	:	برق
electronic file name	:	TL49957.pdf
Title and statement of responsibility and	:	BUILT-IN SELF-TEST AND SELF-REPAIR ARCHITECTURE FOR DEFECT-TOLERANT WORD-ORIENTED LARGE CAPACITY MEMORIES.POMPES PAR TRANSITIONS MULTIPLES [Thesis]