A Prototype Implementation of a Split-Transaction Bus with Enhanced Arbitration for System-on-Chip Multiprocessors.POMPES PAR TRANSITIONS MULTIPLES

منو

" A Prototype Implementation of a Split-Transaction Bus with Enhanced Arbitration for System-on-Chip Multiprocessors.POMPES PAR TRANSITIONS MULTIPLES "

Document Type	:	Latin Dissertation
Language of Document	:	English
Record Number	:	153850
Doc. No	:	ET25642
Main Entry	:	James Harold Reed
Title Proper	:	A Prototype Implementation of a Split-Transaction Bus with Enhanced Arbitration for System-on-Chip Multiprocessors.POMPES PAR TRANSITIONS MULTIPLES
Note	:	This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract	:	Trends in microelectronics technology are allowing increased performance through integra-tion of embedded DRAM and multiprocessors in System-on-Chip designs. The interconnectbetween the processors and memory in these systems can become a bottleneck for a shared-.
Subject	:	Electericl tess
	:	برق
electronic file name	:	TL49907.pdf
Title and statement of responsibility and	:	A Prototype Implementation of a Split-Transaction Bus with Enhanced Arbitration for System-on-Chip Multiprocessors.POMPES PAR TRANSITIONS MULTIPLES [Thesis]