A Versatile FPGA-based High Speed Bit Error Rate Testing Scheme.POMPES PAR TRANSITIONS MULTIPLES

منو

" A Versatile FPGA-based High Speed Bit Error Rate Testing Scheme.POMPES PAR TRANSITIONS MULTIPLES "

Document Type	:	Latin Dissertation
Language of Document	:	English
Record Number	:	153825
Doc. No	:	ET25617
Main Entry	:	Yongquan Fan
Title Proper	:	A Versatile FPGA-based High Speed Bit Error Rate Testing Scheme.POMPES PAR TRANSITIONS MULTIPLES
Note	:	This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract	:	FPGAs have witnessed an increased use of dedicated communication interfaces. Withtheir increased use, it is becoming critical to test and properly characterize all suchinterfaces. Bit error rate (BER) characteristic is one of the basic measures of theperformance of any digital communication system. Traditionally,.
Subject	:	Electericl tess
	:	برق
electronic file name	:	TL49882.pdf
Title and statement of responsibility and	:	A Versatile FPGA-based High Speed Bit Error Rate Testing Scheme.POMPES PAR TRANSITIONS MULTIPLES [Thesis]