A HARDWARE PROGRAMMABLE NETWORK PROCESSOR.POMPES PAR TRANSITIONS MULTIPLES

منو

" A HARDWARE PROGRAMMABLE NETWORK PROCESSOR.POMPES PAR TRANSITIONS MULTIPLES "

Document Type	:	Latin Dissertation
Language of Document	:	English
Record Number	:	153813
Doc. No	:	ET25605
Main Entry	:	DAN MUNTEANU
Title Proper	:	A HARDWARE PROGRAMMABLE NETWORK PROCESSOR.POMPES PAR TRANSITIONS MULTIPLES
Note	:	This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract	:	This thesis proposes a hardware-programmable network processor that can adapt trafficto wireless networks to improve data throughput and customize content for the capacityand speed of the wireless devices. FPGA technology is used in conjunction with.
Subject	:	Electericl tess
	:	برق
electronic file name	:	TL49868.pdf
Title and statement of responsibility and	:	A HARDWARE PROGRAMMABLE NETWORK PROCESSOR.POMPES PAR TRANSITIONS MULTIPLES [Thesis]