Realizing Vertical Bipolar Transistors in an Standard CMOS Technology for the Design of Low Cost BiCMOS Integrated Circuits.POMPES PAR TRANSITIONS MULTIPLES

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" Realizing Vertical Bipolar Transistors in an Standard CMOS Technology for the Design of Low Cost BiCMOS Integrated Circuits.POMPES PAR TRANSITIONS MULTIPLES "

Document Type	:	Latin Dissertation
Language of Document	:	English
Record Number	:	153705
Doc. No	:	ET25497
Main Entry	:	Farshid Rezaei
Title Proper	:	Realizing Vertical Bipolar Transistors in an Standard CMOS Technology for the Design of Low Cost BiCMOS Integrated Circuits.POMPES PAR TRANSITIONS MULTIPLES
Note	:	This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract	:	This thesis describes the realization of isolated vertical npn transistors in genericCMOS technologies. An improved layout for these parasitic transistors is proposed. Theelectrical characteristics and modelling of the proposed device are presented. The design,realization, and fabrication of a high-speed open-loop preamplifier using these bipolartransistors are also presented. The preamplifier was found to have more than.
Subject	:	Electericl tess
	:	برق
electronic file name	:	TL49753.pdf
Title and statement of responsibility and	:	Realizing Vertical Bipolar Transistors in an Standard CMOS Technology for the Design of Low Cost BiCMOS Integrated Circuits.POMPES PAR TRANSITIONS MULTIPLES [Thesis]