BIST-DIAGNOSIS OF INTERCONNECT FAULT LOCATIONS IN FPGA'SPOMPES PAR TRANSITIONS MULTIPLES

منو

" BIST-DIAGNOSIS OF INTERCONNECT FAULT LOCATIONS IN FPGA'SPOMPES PAR TRANSITIONS MULTIPLES "

Document Type	:	Latin Dissertation
Language of Document	:	English
Record Number	:	153384
Doc. No	:	ET25176
Main Entry	:	JING LIU
Title Proper	:	BIST-DIAGNOSIS OF INTERCONNECT FAULT LOCATIONS IN FPGA'SPOMPES PAR TRANSITIONS MULTIPLES
Note	:	This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract	:	lnterconnect testing is critical to FPGA testing since interconnect occupies an area even largerthan the logic resources in an FPGA. Although FPGA's are tested before being shipped, there willbe new faults that appear during the initial life of the FPGA. An effective testing approach forSRAM-based FPGA's would be to identify new faults at power-on, diagnose their locations, and.
Subject	:	Electericl tess
	:	برق
electronic file name	:	TL49407.pdf
Title and statement of responsibility and	:	BIST-DIAGNOSIS OF INTERCONNECT FAULT LOCATIONS IN FPGA'SPOMPES PAR TRANSITIONS MULTIPLES [Thesis]