A Systemsn-Chip (SoC) Digital Interface IP CorePOMPES PAR TRANSITIONS MULTIPLES

منو

" A Systemsn-Chip (SoC) Digital Interface IP CorePOMPES PAR TRANSITIONS MULTIPLES "

Document Type	:	Latin Dissertation
Language of Document	:	English
Record Number	:	153088
Doc. No	:	ET24880
Main Entry	:	HUIMEI ZHENG
Title Proper	:	A Systemsn-Chip (SoC) Digital Interface IP CorePOMPES PAR TRANSITIONS MULTIPLES
Note	:	This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract	:	The work presented in this thesis describes a digital intaface Intellectual Property (IP)core, for use in a Systemon-Chip (SoC) environment, This IP core allows the main SoCbus to read and write to peripheral devices, such as A/D and D/A converters,respeaively..
Subject	:	Electericl tess
	:	برق
electronic file name	:	TL49091.pdf
Title and statement of responsibility and	:	A Systemsn-Chip (SoC) Digital Interface IP CorePOMPES PAR TRANSITIONS MULTIPLES [Thesis]