FPGA Design and Implementation of Systolic Array-Based Viterbi DecodersPOMPES PAR TRANSITIONS MULTIPLES

منو

" FPGA Design and Implementation of Systolic Array-Based Viterbi DecodersPOMPES PAR TRANSITIONS MULTIPLES "

Document Type	:	Latin Dissertation
Language of Document	:	English
Record Number	:	152993
Doc. No	:	ET24785
Main Entry	:	Man Guo
Title Proper	:	FPGA Design and Implementation of Systolic Array-Based Viterbi DecodersPOMPES PAR TRANSITIONS MULTIPLES
Note	:	This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract	:	The Viterbi algorithm is known to provide an efficient method for the maximum like-lihood decoding of convolutional codes. The algorithm can be formulated by employing amatrix-vsctor compi~t;ition ;mtl it can hc ilnplcmcntctl in hnrclware based on a systolic.
Subject	:	Electericl tess
	:	برق
electronic file name	:	TL48996.pdf
Title and statement of responsibility and	:	FPGA Design and Implementation of Systolic Array-Based Viterbi DecodersPOMPES PAR TRANSITIONS MULTIPLES [Thesis]