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" VLSI Implementation of A 213 Viterbi Decoder and Noise Effects in Digital ICsPOMPES PAR TRANSITIONS MULTIPLES "


Document Type : Latin Dissertation
Language of Document : English
Record Number : 152838
Doc. No : ET24630
Main Entry : Youxiong Zhao
Title Proper : VLSI Implementation of A 213 Viterbi Decoder and Noise Effects in Digital ICsPOMPES PAR TRANSITIONS MULTIPLES
Note : This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract : This thesis consists of two major objectives in the digital circuit area The first objectiveis the VLSI implementation of a high speed 2/3 Viterbi Decoder ( ISO/IEC 16500) for aMMDS receiver using an automatic synthesis design flow. The design was implementedusing TSMC CMOSP35 technologies using Verilog HDL, Cadence, and Synopsys. The.
Subject : Electericl tess
: برق
electronic file name : TL48839.pdf
Title and statement of responsibility and : VLSI Implementation of A 213 Viterbi Decoder and Noise Effects in Digital ICsPOMPES PAR TRANSITIONS MULTIPLES [Thesis]
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TL48839.pdf
TL48839.pdf
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