ATM Simulator Hardware Design Utilizing the PC1 BusPOMPES PAR TRANSITIONS MULTIPLES

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" ATM Simulator Hardware Design Utilizing the PC1 BusPOMPES PAR TRANSITIONS MULTIPLES "

Document Type	:	Latin Dissertation
Language of Document	:	English
Record Number	:	152620
Doc. No	:	ET24412
Main Entry	:	Wei Wang
Title Proper	:	ATM Simulator Hardware Design Utilizing the PC1 BusPOMPES PAR TRANSITIONS MULTIPLES
Note	:	This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract	:	This thesis examines the feasibility of developing an ATM simulator to help inthe research and teaching of 25.6 Mbps ATM networks. An ATM chip has beensuccessfully developed to perform the ATM layer's functions for the ATM simulator inthis thesis. This chip consists of nine function blocks plus three FFOs. These functionblocks include three interfaces: PC1 bus, UTOPIA and SRAM interface, five function.
Subject	:	Electericl tess
	:	برق
electronic file name	:	TL48619.pdf
Title and statement of responsibility and	:	ATM Simulator Hardware Design Utilizing the PC1 BusPOMPES PAR TRANSITIONS MULTIPLES [Thesis]