Evaluation of the OneChip Reconfigurable ProcessorPOMPES PAR TRANSITIONS MULTIPLES

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" Evaluation of the OneChip Reconfigurable ProcessorPOMPES PAR TRANSITIONS MULTIPLES "

Document Type	:	Latin Dissertation
Language of Document	:	English
Record Number	:	152367
Doc. No	:	ET24159
Main Entry	:	Jorge Ernesto Carrillo Esparza
Title Proper	:	Evaluation of the OneChip Reconfigurable ProcessorPOMPES PAR TRANSITIONS MULTIPLES
Note	:	This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract	:	The concept of a reconfigurable processor comes from the idea of having a general-purposeprocessor coupled with some reconfigurable resources that allow implementation of customapplication-specific instructions. This thesis describes OneChip, a third generationrcconfigurable processor architecture that integrates a Reconfigurable Funtional Unit (RFU)into a superscalar Reduced Instruction Set Computer (RISC) processor's pipeline. Thearchitecture allows dynamic scheduling and dynamic reconfiguration..
Subject	:	Electericl tess
	:	برق
electronic file name	:	TL48361.pdf
Title and statement of responsibility and	:	Evaluation of the OneChip Reconfigurable ProcessorPOMPES PAR TRANSITIONS MULTIPLES [Thesis]