Generation of Accurate OnmChip ~gn,~:conductances Using a Monolithic CMOS PLL With Hybrid Analog and Digital Control

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" Generation of Accurate OnmChip ~gn,~:conductances Using a Monolithic CMOS PLL With Hybrid Analog and Digital Control "

Document Type	:	Latin Dissertation
Language of Document	:	English
Record Number	:	152318
Doc. No	:	ET24110
Main Entry	:	Angus McLaren
Title Proper	:	Generation of Accurate OnmChip ~gn,~:conductances Using a Monolithic CMOS PLL With Hybrid Analog and Digital Control
Note	:	This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract	:	A method for generating accurately-known on-chip transistor transconductances over pro-cess, power-supply. and temperature variations is presented. The technique uses an adjustableconstant-g, bias circuit, which is tuned with a Nly-integrated CMOS PLL locked to an externalfrequency reference normally present to produce a system clock. The PLL uses a charge-pumpstructure with three control-loops (two digital and one analog) having overlapping ranges with.
Subject	:	Electericl tess
	:	برق
electronic file name	:	TL48312.pdf
Title and statement of responsibility and	:	Generation of Accurate OnmChip ~gn,~:conductances Using a Monolithic CMOS PLL With Hybrid Analog and Digital Control [Thesis]