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" A Field Programmable Gate Array Architecture for Two-Dimensional Partial Reconfiguration "


Document Type : Latin Dissertation
Language of Document : English
Record Number : 152295
Doc. No : ET24087
Main Entry : Fei Wang
Title Proper : A Field Programmable Gate Array Architecture for Two-Dimensional Partial Reconfiguration
Note : This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract : Reconfigurable machines can accelerate many applications by adapting to theirneeds through hardware reconfiguration. Partial reconfiguration allows thereconfiguration of a portion of a chip while the rest of the chip is busy working on tasks.Operating system models have been proposed for partially reconfigurable machines tohandle the scheduling and placement of tasks. They are called OS4RC in this dissertation..
Subject : Electericl tess
: برق
electronic file name : TL48284.pdf
Title and statement of responsibility and : A Field Programmable Gate Array Architecture for Two-Dimensional Partial Reconfiguration [Thesis]
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TL48284.pdf
TL48284.pdf
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