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" An Asynchronous Superscalar Architecture for Exploiting Instruction-Level Parallelism "


Document Type : Latin Dissertation
Language of Document : English
Record Number : 151642
Doc. No : ET23434
Main Entry : TONY LEE WERNER
Title Proper : An Asynchronous Superscalar Architecture for Exploiting Instruction-Level Parallelism
Note : This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract : I want to thank my committee members, Prof. Kent Wilken, Prof. Fred Chong, andparticularly, my advisor, Prof. Venkatesh Akella. Upon arrival at UC-Davis, my original plan was tostudy analog circuit design, which quickly changed in the first week of attendance after listening toProf. Akella's lecture on asynchronous logic design. I expect to continue my research ofasynchronous logic for many years to come. I must also thank him for his guidance and patiencethroughout this tong and arduous period, especially with my time and attention divided betweenacademics and employment.I want to thank all my supervisors over the past 7 years, which includes Dave Piotrkowski,Cary Meline, Atlee Homer, Jerry Tucker, and John Sirnons. I particularly want to recognize EricCampbell for encouraging me to enroll in the concurrent program with UC-Davis and then allowingme the time to attend classes......-....,....-...,..tested for theQ1 PC1 bus cardBoth these projects mere sofixare des elopment efforts tonards contributing to dlfferentaspects of Roboucs and lZ1echatronics projects m the Controls and Roboucs Group..
Subject : Electericl tess
: برق
electronic file name : TL46673.pdf
Title and statement of responsibility and : An Asynchronous Superscalar Architecture for Exploiting Instruction-Level Parallelism [Thesis]
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TL46673.pdf
TL46673.pdf
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