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Document Type : Latin Dissertation
Language of Document : English
Record Number : 151326
Doc. No : ET23118
Main Entry : Amit S. Deshmukh
Title Proper : Design and Implementation of 16-bit CRC Chip along With Detailed simulation
Note : This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract : Error in digital data transmission is a common and frequently occurringproblem. Thus, error detection plays a significant role in the field of datacommunications. Earlier methods of error detection were based on parityand hamming codes, however, as high speed networks came into being,these methods were less effective. Modem day communication andnetworking systems ensure data transfer reliability using Cyclic RedundancyCheck (CRC). The technique gained its popularity because it combines threeadvantages: Extreme error detection capabilities, little overhead, and ease ofimplementation.This technical paper describes the design implementation and synthesis of16-bit CRC to a reconfigurable Logic fabric named CS2112. Thisapplication uses the shift register logic of determining 16-bit frame checksum (FCS) with a throughput of one bit every four clock cycles and can bereconfigured to support flexible CRC generation via parameter specified byuser as regards size of frame bytes etc. The design generates the appropriate.-....,....-...,..tested for theQ1 PC1 bus cardBoth these projects mere sofixare des elopment efforts tonards contributing to dlfferentaspects of Roboucs and lZ1echatronics projects m the Controls and Roboucs Group..
Subject : Electericl tess
: برق
electronic file name : TL46352.pdf
Title and statement of responsibility and : Design and Implementation of 16-bit CRC Chip along With Detailed simulation [Thesis]
 
 
 
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