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Document Type : Latin Dissertation
Language of Document : English
Record Number : 151296
Doc. No : ET23088
Main Entry : KUMARAN NATARAJAN
Title Proper : STUDY OF HIGH SPEED ADDER CIRCUITS
Note : This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract : The CPU is the central part of all microprocessors, which in turn forms the centralfunctioning unit of any computer. The speed performance of the CPU depends on itsadder circuits. There is an inherent need to make the adders work as fast as possible. Thekey to achieving high performance adders is to optimize the adder circuit's critical path.Various adder circuits like Conditional Cany Select (CCS ), Successiveiy IncrementedCany Number Block (SICNB). Carry Look Ahead (CLA), and Brent-Kung (B-K) areanalyzed. The main objective is to improve performance with respect to speed byidentifying the circuit that has the best optimized critical path. The proposed addenwould be simulated using VHDL (Very High Speed Integrated Circuits HardwareDescription Language) followed by an implementation on a FLEXIOK FPGA chip using.-....,....-...,..tested for theQ1 PC1 bus cardBoth these projects mere sofixare des elopment efforts tonards contributing to dlfferentaspects of Roboucs and lZ1echatronics projects m the Controls and Roboucs Group..
Subject : Electericl tess
: برق
electronic file name : TL46322.pdf
Title and statement of responsibility and : STUDY OF HIGH SPEED ADDER CIRCUITS [Thesis]
 
 
 
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