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Document Type : Latin Dissertation
Language of Document : English
Record Number : 150897
Doc. No : ET22689
Main Entry : Sridhar Rajagopal
Title Proper : Baseband Architecture Design for Future Wireless Base-Stat ion Receivers
Note : This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract : This thesis demonstrates the use of designing efficient algorithms and architecturesto meet the real-time requirements of future wireless base-stat ion receivers. Nextgeneration receivers will require orders-of-magnitude performance improvements inorder to provide support for features such as Multimedia, Quality-Of-Service andextremely high data rates. The sophisticated, compute-intensive algorithms proposedto integrate these features make their real-time implementation difficult on currentDigital Signal Processor (DSP)-based receivers. A real-time implementation can beachieved by (1) making the algorithms cornputationally efficient, without significantloss in error rate performance, (2) task partitioning and (3) designing hardware toexploit available pipelining, parallelism and bit-level computations.Multiuser Channel Estimation and Detection, two of the most compute-intensivebaseband tasks in the receiver, are implemented on DSPs for performance evaluation.A reduced complexity iterative channel estimation scheme for slow fading channels isproposed for a fixed point, area-time efficient and real-time VLSI architecture. Themultiuser detection algorithm is modified for a simple, pipelined structure.....-...,..tested for theQ1 PC1 bus cardBoth these projects mere sofixare des elopment efforts tonards contributing to dlfferentaspects of Roboucs and lZ1echatronics projects m the Controls and Roboucs Group..
Subject : Electericl tess
: برق
electronic file name : TL45915.pdf
Title and statement of responsibility and : Baseband Architecture Design for Future Wireless Base-Stat ion Receivers [Thesis]
 
 
 
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