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Document Type : Latin Dissertation
Language of Document : English
Record Number : 150079
Doc. No : ET21871
Main Entry : Sarvesh Hemchandra Kulkarni
Title Proper : LOW-POWER DESIGN OPTIMIZATION LEVERAGING MULTIPLE THRESHOLD AND SUPPLY VOLTAGES
Note : This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract : Successful CMOS process scaling is the key driving force behind the powerfulrole played by the semiconductor industry in the world today. This scaling has enabledspectacular growth in integration levels and computational abilities of digital integratedcircuits. Every new technology generation enables about 13 reduction in minimumtransistor dimension every year [1.1]. This reduction results in the ability to double theintegration density on integrated circuits every 1-2 years, thereby sustaining thepredictions of Moore's law [1.2]. Unfortunately, this scaling is marred by severalchallenges for the future. As example, physical,..tested for theQ1 PC1 bus cardBoth these projects mere sofixare des elopment efforts tonards contributing to dlfferentaspects of Roboucs and lZ1echatronics projects m the Controls and Roboucs Group..
Subject : Electericl tess
: برق
electronic file name : TL45062.pdf
Title and statement of responsibility and : LOW-POWER DESIGN OPTIMIZATION LEVERAGING MULTIPLE THRESHOLD AND SUPPLY VOLTAGES [Thesis]
 
 
 
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