ANALYSIS OF LOGIC BLOCK ARCHITECTURES AND FUNCTIONAL IMPROVEMENT OF FINE GRAINED CELLS

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" ANALYSIS OF LOGIC BLOCK ARCHITECTURES AND FUNCTIONAL IMPROVEMENT OF FINE GRAINED CELLS "

Document Type	:	Latin Dissertation
Language of Document	:	English
Record Number	:	149057
Doc. No	:	ET20849
Main Entry	:	Rohith Ramnath
Title Proper	:	ANALYSIS OF LOGIC BLOCK ARCHITECTURES AND FUNCTIONAL IMPROVEMENT OF FINE GRAINED CELLS
Note	:	This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract	:	The first objective of this research project was to evaluate theperformance of various logic block architectures in FPGAs. Since logic blockswidely vary in size, functionality and complexity, we were motivated toexplore them in detail. For our study, logic blocks from Actel, Altera,Quicklogic and Xilinx were chosen along with some designs discussed in theacademia. These cells were either multiplexer based or look-up-table (LUT).
Subject	:	Electericl tess
	:	برق
electronic file name	:	TL43995.pdf
Title and statement of responsibility and	:	ANALYSIS OF LOGIC BLOCK ARCHITECTURES AND FUNCTIONAL IMPROVEMENT OF FINE GRAINED CELLS [Thesis]