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Document Type : Latin Dissertation
Language of Document : English
Record Number : 148692
Doc. No : ET20484
Main Entry : Praveen Mutyala
Title Proper : ENHANCED BUS ARCHITECTURE
Note : This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract : This thesis presents the design and implementation of enhanced bus architecture. Itmainly contains three units (1) The Slave backend interface that is being designaccording to the specification of AHB (Advanced High Performance Bus). (2) There arethree asynchronous FIFO that improve the performance of the design. This design helpsin faster rate of data transfer and can be used by many high bandwidth devices. It showsthe transfer of three types of.
Subject : Electericl tess
: برق
electronic file name : TL43621.pdf
Title and statement of responsibility and : ENHANCED BUS ARCHITECTURE [Thesis]
 
 
 
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