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Document Type : Latin Dissertation
Language of Document : English
Record Number : 148658
Doc. No : ET20450
Main Entry : Sireesha Kandula
Title Proper : Application of VHDL-AMS to Modeling and Assessment of Integrated Circuit Clock Distribution Networks
Note : This document is digital این مدرک بصورت الکترونیکی می باشد
Abstract : In the past few decades, integrated circuit technology has been advancing rapidly.Clock distribution over an entire chip is a very complex problem and is one of the mainchallenges in the design of todayبs high-performance processors. The performance andfunctionality of the entire system depends on the clock characteristics. For a VLSI circuit,an accurate model of the clock distribution network is helpful for the precise performanceevaluation of the system [1]. It will be of great help to the circuit designers to modeluncertainties in the clock signal arrival times between key points in a clock distributionnetwork..
Subject : Electericl tess
: برق
electronic file name : TL43585.pdf
Title and statement of responsibility and : Application of VHDL-AMS to Modeling and Assessment of Integrated Circuit Clock Distribution Networks [Thesis]
 
 
 
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